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| PJ7900 Series 3-Terminal Negative Output Voltage Regulators T hese voltage regulators are intended as complements to the popular PJ7900 Series devices. These negative Available in fixed output voltage options from -5.0 to - 24 volts, these regulators employ current limiting, thermal shutdown, and safe-area compensation--making them remarkably rugged under most operating conditions. With adequate heatsinking they can deliver output currents in excess of 1 ampere. regulators are available in the same seven-voltage options as the PJ7900 devices. In addition, one extra voltage option commonly employed in MECL systems is also available in the negative PJ7900 Series. FEATURES * * * * * * Output Current up to 1 Ampere No External Components Required Internal Thermal Overload Protection Internal Short-Circuit Current Limiting Output Transistor Safe-Area Compensation Available in 4% Voltage Tolerance ORDERING INFORMATION Operating Temperature (Ambient) -20 to +85 Pin : 1. Ground 2. Input 3. Output (Heatsink surface connected to Pin 2.) TO-220 TO-220F Device PJ79xxCZ PJ79xxCI Package TO-220 TO-220F CIRCUIT SCHEMATIC 1-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators ABSOLUTE MAXIMUM RATINGS (Ta=25) RATING Input Voltage *(-5VVo-18V) **(-24V) Power Dissipation TO-220 TO-220 TO-220F Operating Ambient Temperature Operating Junction Temperature Storage Temperature SYMBOL Vin Without heatsink PJ7900 Series -35 -40 2 15 10 -20 to +85 0 to +125 -25 to +150 UNIT V Pt *** With heatsink Topr Tj Tstg /W Note: *1: PJ7905 to PJ7918 **2: PJ7924 ***3: Follow the derating curve. When Tj exceeds 150, the internal circuit cuts off the output. * PJ7905 ELECTRICAL CHARACTERISTICS (Vin=-10V, Iout=500mA, Cin=2F, Cout=1F; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX UNIT Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 Iq Vn RR Vdif Io-peak 2 1 3 1 1 Tj=25 Vi=-7 to -20V, Io=5mA to 1A, PD<15W Tj=25 Vi=-7 to -25V Vi=-8 to -12V Tj=25 Io=5mA to 1.5A Io=250mA to 750mA Tj=25 VIN=-7 to -25V Io=5mA to 1.5A f=10Hz to 100KHz, Ta=25 Vi=-8 to -18V, Io=100mA, f=120Hz Io=1A, Tj=25 Tj=25 Io=5mA, Tj=0 to 125 -4.80 -4.75 -------62 ---- -5.0 -5.0 3 1 10 3 2 -40 74 1.1 2.1 -0.4 -5.20 -5.25 100 50 100 50 4 1.3 0.5 ------ V V mV mV mV mV mA mA V dB V A mV/ Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. STANDARD APPLICATION A common ground is required between the input and the output voltages. The input voltage must remain typically 2.0 V more negative even during the high point on the input ripple voltage. XX = these two digits of the type number indicate voltage. * = Cin is required if regulator is located an appreciable distance from power supply filter. ** = Co improves stability and transient response. 2-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators * PJ7906 ELECTRICAL CHARACTERISTICS (Vin=-11V, Iout=500mA, Cin=2F, Cout=1F; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNIT Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 2 1 3 Tj=25 Vi=-8 to -21V, lo=5mA to 1A, PD<15W Tj=25 Tj=25 Tj=25 Vi=-8 to -25V, Tj=25 lo=5mA to 1A, Tj=25 f=10Hz to 100KHz, Ta=25 Vi=-9 to -19V, Io=100mA, f=120Hz Io=1A, Tj=25 Vi=-8 to -25V Vi=-9 to -13V Io=5mA to 1.5A Io=250mA to 750mA -5.75 -5.70 --------60 ---- -6.0 -6.0 4 1.5 10 3 2 --44 73 1.1 2.1 -0.5 -6.25 -6.30 120 60 120 60 4 1.3 0.5 ------ V V mV mV mV mV mA mA mA Iq Vn RR Vdif Io-peak V dB V A mV/ 1 1 Tj=25 Io=5mA, Tj=0 to 125 Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. * PJ7908 ELECTRICAL CHARACTERISTICS (Vin=-14V, Iout=500mA, Cin=2F, Cout=1F; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNIT Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 2 1 3 Tj=25 Vi=-10.5 to -23V, lo=5mA to 1A, PD<15W Tj=25 Tj=25 Tj=25 Vi=-10.5 to -25V, Tj=25 lo=5mA to 1A f=10Hz to 100KHz, Ta=25 Vi=-11 to -21V, Io=100mA, f=120Hz Io=1A, Tj=25 Vi=-10.5 to -25V Vi=-11 to -17V Io=5mA to 1.5A Io=250mA to 750mA -7.69 -7.61 --------56 ---- -8.0 -8.0 6 2 12 4 2 --52 71 2 2.1 -0.6 -8.32 -8.40 160 80 160 80 4 1 0.5 ------ V V mV mV mV mV mA mA mA Iq Vn RR Vdif Io-peak V dB V A mV/ 1 1 Tj=25 Io=5mA, Tj=0 to 125 Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. 3-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators * PJ7909 ELECTRICAL CHARACTERISTICS ( Vin=-15V , Iout=500mA, Cin=2uF, Cout=1uF; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNIT Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Bias Current Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 2 2 1 3 1 1 Tj=25 Vi=-11.5 to -24V, lo=5mA to 1A, PD<15W Tj=25 Vi=-11.5 to -26V Vi=-12 to -18V Tj=25 Io=5mA to 1.5A Io=250mA to 750mA Tj=25 Vi=-11.5 to -26V, Tj=25 lo=5mA to 1.5A Tj=25 f=10Hz to 100KHz, Ta=25 Vi=-12 to -22V,Io=100mA, f=120Hz Io=1A, Tj=25 Tj=25 Io=5mA, Tj=0 to 125 -8.65 -8.57 ---------56 ---- -9.0 -9.0 7 2 12 4 2.2 --2.2 58 71 1.1 2.1 -0.6 -9.36 -9.45 180 90 180 90 4.5 1 0.5 4.5 ------ V V mV mV mV mV mA mA mA mA Iq IIB Vn RR Vdif Io-peak V dB V A mV/ Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. * PJ7912 ELECTRICAL CHARACTERISTICS (Vin=-19V, Iout=500mA, Cin=2F, Cout=1F; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNIT Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 2 1 3 1 1 Tj=25 Vi=-14.5 to -27V, lo=5mA to 1A, PD<15W Tj=25 Vi=-14.5 to -30V Vi=-16 to -22V Tj=25 Io=5mA to 1.5A Io=250mA to 750mA Tj=25 Vi=-14.5 to -30V, Tj=25 lo=5mA to 1.5A f=10Hz to 100KHz, Ta=25 Vi=-15 to -25V, Io=100mA, f=120Hz Io=1A, Tj=25 Tj=25 Io=5mA, Tj=0 to 125 -11.53 -11.42 --------55 ---- -12 -12 10 3 12 4 2.5 --75 70 1.1 2.1 -0.8 -12.48 -12.60 240 120 240 120 5 1 0.5 ------ V V mV mV mV mV mA mA mA Iq Vn RR Vdif Io-peak V dB V A mV/ Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. 4-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators * PJ7915 ELECTRICAL CHARACTERISTICS (Vin=-23V, Iout=500mA, Cin=2F, Cout=1F; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNI T Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 2 1 3 1 1 Tj=25 Vi=-17.5 to -30V, Io=5mA to 1A, PD<15W Tj=25 Vi=-17.5 to -30V Vi=-20 to -26V Tj=25 Io=5mA to 1.5A Io=250mA to 750mA Tj=25 Vi=-17.5 to -30V lo=5mA to 1A f=10Hz to 100KHz, Ta=25 Vi=-18.5 to -28.5V, Io=100mA, f=120Hz Io=1A, Tj=25 Tj=25 Io=5mA, Tj=0 to 125 -14.42 -14.28 --------54 ---- -15 -15 11 3 12 4 2.5 --90 69 1.1 2.1 -0.9 -15.60 -15.75 300 150 300 150 5 1 0.5 ------ V V mV mV mV mV mA mA mA Iq Vn RR Vdif Io-peak V dB V A mV/ Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. * PJ7918 ELECTRICAL CHARACTERISTICS (Vin=-27V, Iout=500mA, Cin=2F, Cout=1F; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNIT Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient Vo REGline REGload Iq 1 1 1 2 2 1 3 1 1 Iq Vn RR Vdif Io-peak Tj=25 Vi=-21 to -33V, Io=5mA to 1A, PD<15W Tj=25 Vi=-21 to -33V Vi=-24 to -30V Tj=25 Io=5mA to 1.5A Io=250mA to 750mA Tj=25 Vi=-21 to -33V, Tj=25 lo=5mA to 1.5A, Tj=25 f=10Hz to 100KHz, Ta=25 Vi=-22 to -32V, Io=100mA, f=120Hz Io=1A, Tj=25 Tj=25 Io=5mA, Tj=0 to 125 -17.30 -17.14 --------53 ---- -18 -18 15 5 12 4 2.5 --110 68 1.1 2.1 -1 -18.72 -18.90 360 180 360 180 5 1 0.5 ------ V V mV mV mV mV mA mA mA V dB V A mV/ Vo/Ta Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. 5-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators * PJ7924 ELECTRICAL CHARACTERISTICS (Vin=-33V, Iout=500mA, Cin=2uF, Cout=1uF; Tj=0 to 125, unless otherwise specified.) CHARACTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. MAX. UNIT Output Voltage Vo 1 Tj=25 Vi=-27 to -38V, Io=5mA to 1A, PD<15W Tj=25 Vi=-27 to -38V Vi=-30 to -36V Tj=25 Io=5mA to 1.5A Io=250mA to 750mA Tj=25 Vi=-27 to -38V, Tj=25 Io=5mA to 1.5A, Tj=25 f=10Hz to 100KHz, Ta=25 Vi=-28 to -38V, Io=100mA, f=120Hz Io=1A, Tj=25 -23.07 -22.85 --------50 --- -24 -24 18 6 12 4 3 --170 65 1.1 2.1 -24.96 -25.20 480 240 480 240 5 1 0.5 ----- V V mV mV mV mV mA mA mA Line Regulation REGline 1 Load Regulation Quiescent Current Quiescent Current Change Output Noise Voltage Ripple Rejection Ratio Min. I/O Voltage Difference Peak Output Current Output Voltage Tempoerature Coefficient REGload Iq 1 2 2 1 3 Iq Vn RR Vdif Io-peak V dB V A mV/ 1 Tj=25 Vo/Ta 1 Io=5mA, Tj=0 to 125 -- -1 -- Note: The specified condition Tj=25 means that the test should be carried out with the test time so short (within 10mS), that the drift in characteristic value due to the rise in chip junction temperature can be ignored. 6-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators FIGURE 1 -WORST CASE POWER DISSIPATION FIGURE DISSIPATION AS A FUNCTION OF AMBIENT TEMPERATURE 2 - WORST CASE POWER AS FUNCTION OF AMBIENT TEMPERATURE FIGURE 3 - PEAK OUTPUT CURRENT AS A FIGURE FUNCTION OF INPUT-OUTPUT DIFFERENTIAL VOLTAG 4 - RIPPLE REJECTION AS A FUNCTION OF FREQUENCY FIGURE 5 - RIPPLE REJECTION AS A FUNCTION FIGURE FUNCTION OF OUTPUT VOLTAGES 6 - OUTPUT VOLTAGE AS A OF JUNCTION TEMPERATUR 7-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators 8-9 2002/10.rev.A PJ7900 Series 3-Terminal Negative Output Voltage Regulators 9-9 2002/10.rev.A |
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